Projects
(US$1=NT$29.626 on May 28, 2012)
“應用於癲癇發作偵測的智慧型頭帶開發及其電路與系統設計” , MOST 105-2221-E-009-174, 08/01/2016~07/31/201, NT$660,000, PI.
"高速高力靈敏度原子力顯微術之開發及生物課題之應用-應用於高速高力靈敏度原子力顯微鏡之超大型積體電路與晶片 系統開發(子計畫二 )", MOST 105-2627-M-009-001-, 104-2627-M-009-002-, 103-2627-M-009-003-, 08/01/2014~07/31/2017, NT$3,893,000, PI.
"應用於平板裝置之多重感測器融合資料管理及預先回饋技", 香港商新思國際科技有限公司台灣分公司, NT$3,750,000, Co-PI. (PI: Li-Chun Wang)
"以手持式電子鼻系統早期偵測與長期監控慢性阻塞性肺病的病患-子計畫三:低壓低功耗之可擴充式電子鼻單晶片設計實現", MOST 104-2220-E-007-009-, MOST 103-2220-E-007- 024-, 05/01/2014~04/30/2016, NT$1,784,000, Co-PI. (Pi: Chih-Chen, Hsieh)
"多通道多模式生理信號截取與分析平台的關鍵矽智財之設計與實現", MOST 103-2221-E-009-207, 08/01/2014-07/31/2015, NT$725,000, PI.
"Development of Seizure Detection Headband for Microsoft Health Platform", Microsoft Research Asia, 05/17/2015 ~, NT$600,000, PI.
"低侵入性三維深層醫學美容用皮膚組織造影設備", MOST 102- 2622-E-159-001-CC1, 02/01/2013~01/31/2014, NT$1,292,000, Co-PI. (Pi: Po-Wen Yang)
"開發新式骨導式人工耳蝸-子計畫三:骨導式人工耳蝸之可程式化低能耗數位訊號處理器設計", MOST 103-2220-E-009- 002-, MOST 102-2220-E-009- 048-, NSC 101-2220-E-009-064-, 05/01/2012~07/31/2015, NT$4,649,000, Co-PI. (Pi: Chia-Hsiang Yang)
"癲癇治療電子系統之研發及其動物實驗之驗證-子計畫六 :應用於癲癇治療之生理訊號處理矽智財設計", NSC 102-2220-E-009-003, NSC 101-2220-E-009-019, NSC 100-2220-E-009-020, 05/01/2011~07/31/2014, NT$2,508,000, PI.
"癲癇治療電子系統之研發及其動物實驗之驗證-總計畫暨子計畫五:應用於癲癇治療元件之混合訊號與射頻整合晶片設計 Research and Development of Epilepsy Prosthetic System and its Animal Experimentation", NSC 100-2220-E-009-018, NSC 101-2220-E-009-017, NSC102-2220-E-009- 001-, 05/01/2011~07/31/2014, NT$26,235,000, Co-PI. (PI: Peter Chung-Yu Wu)
"硬體惡意行為檢測技術研究", NSC 101-2623-E-009-007-D, 01/01/2012~12/31/2012, NT$860,000, Co-PI.(PI: Terng-Ying Hsu)
“微型慣性感測元件之訊號處理技術與最佳化設計研究(II)-子計畫三: 微型慣性感測元件的即時訊號處理與排程最佳化實現 Real-Time Signal Processing and Optimization of Scheduling on Micro Inertial Sensors”, NSC 101-2623-E-009-010-D; 01/2012-12/2012, NT$746,000; PI.
“Memory-Centric On-Chip Data Communication for Energy-Efficient Multi-Core Systems”, NSC 99-2221-E-009-184; 08/2010-07/2011, NT$963,000; co-PI, with Wei Huang (PI).
“動物實驗用癲癇治療電子系統之實現 Research and Development on Electronic Epilepsy Prosthetic System for Animal Model Test”, NSC 99-2220-E-009-072; 11/2010-10/2011, NT$8,468,000; PI.
“Analysis of multi-stream physiological signals and its hardware implementation”, NSC 99-2220-E-009-032; 08/2010-10/2011, NT$1,124,000; PI (with co-PI Sheng-Fu Liang and Terng-Yin Hsu).
“Intelligent Long-Time Sleep-Monitoring System with Bio-Feedback Mechanism”, NSC 99-2220-E-009-051; 08/2010-07/2011, NT$1,618,000; co-PI, with Hsie-Chia Chang (PI).
“SoC Platform Technology for Intelligent Prostheses”, NSC 99-2220-E-009-018; 08/2010-07/2011, NT$3,501,000; co-PI, with Chung-Yu (Peter) Wu (PI).
“Analysis of multi-stream physiological signals and its hardware implementation”, NSC 98-2220-E-009-055; 08/2009-10/2010, NT$1,124,000; PI (with co-PI Sheng-Fu Liang and Terng-Yin Hsu).
“Intelligent Long-Time Sleep-Monitoring System with Bio-Feedback Mechanism”, NSC 98-2220-E-009-066; 08/2009-10/2010, NT$1,787,000; co-PI, with Hsie-Chia Chang (PI).
“SoC Platform Technology for Intelligent Prostheses”, NSC 98-2220-E-009-031; 08/2009-10/2010, NT$3,441,000; co-PI, with Chung-Yu (Peter) Wu (PI).
“Low Power On-Demand Memory System for Multi-Core Design”, NSC 98-2220-E-009-002; 08/2009-07/2010, NT$1,175,000; co-PI, with Wei Huang (PI).
“自旋記憶體與溫度感知低功率齊質性處理核心整合平台”, Industrial Technology Research Institute (ITRI); 01/2009-12/2009, NT$600,000; PI.
“SoC Platform Technology for Intelligent Prostheses”, NSC 97-2220-E-009-042; 08/2008-10/2009, NT$2,397,000; co-PI, with Chung-Yu (Peter) Wu (PI).
“Memory-Centric On-Chip Data Communication for Energy-Efficient Multi-Core Systems”, NSC 97-2220-E-009-014; 08/2008-07/2009, NT$1,175,000; co-PI, with Wei Huang (PI).
“Compact Thermal Modeling and Electro-Thermal Simulation for Nano-Scale CMOS Technology”, NSC 97-2220-E-009-005; 08/2008-07/2009, NT$ 1,087,000; PI.
“先進製程技術之設計與可靠度提昇研究-總計畫(3/3)”, NSC 97-2220-E-009-001; 08/2008-07/2009, NT$ 2,780,000; co-PI, with Hung-Ming Chen (PI).
“二維聚焦平面陣列雷射光偵測器開發”, NSC 97-2623-7-009-001-D; 01/2008-12/2008, NT$1,005,000; co-PI, with Chung-Yu (Peter) Wu (PI).
“Memory-Centric On-Chip Data Communication for Energy-Efficient Multi-Core Systems”, NSC 96-2220-E-009-027; 08/2007-07/2008, NT$1,175,000; co-PI, with Wei Huang (PI).
“Compact Thermal Modeling and Electro-Thermal Simulation for Nano-Scale CMOS Technology”, NSC 96-2220-E-009-017; 08/2007-07/2008, NT$1,087,000; PI.
“先進製程技術之設計與可靠度提昇研究-總計畫(2/3)”, NSC 96-2220-E-009-013; 08/2007-07/2008, NT$2,866,000; co-PI, with Hung-Ming Chen (PI).
“二維聚焦平面陣列APD偵測器開發之研究”, Chung- Shan Institute of Science and Technology(CSIST); 04/2007-12/2007, NT$700,000; co-PI, with Chung-Yu (Peter) Wu (PI).
“磁性記憶體與齊質性處理核心整合平台”, Industrial Technology Research Institute (ITRI); 01/2007-12/2008, NT$1,200,000; PI.
“Reconfigurable Hardware Platform Design for FLASH-OFDM Systems”, NSC 95-2219-E-009-018; 08/2006-07/2007, NT$752,000; PI (with co-PI Hsiang-Feng Chi).
“Compact Thermal Modeling and Electro-Thermal Simulation for Nano-Scale CMOS Technology”, NSC 95-2220-E-009-029; 08/2006-07/2007, NT$870,000; PI.
“先進製程技術之設計與可靠度提昇研究-總計畫(1/3)”, NSC 95-2220-E-009-025; 08/2006-07/2007, NT$3,594,000; co-PI, with Hung-Ming Chen (PI).
“System memory design for next-generation e-Home server”, NSC 95-2220-E-009-002; 08/2006-07/2007, NT$952,000; co-PI, with Wei Huang (PI).
“The Design of Extensible Low-Power DSP Core and Configurable Accerator for Mobile Multimedia--DSP Core”, Industrial Technology Research Institute (ITRI); 01/2006-12/2006, NT$2,500,000; co-PI, with Wei Huang (PI).
“低功率系統之設計與自動化-子計畫三:具效率前置錯誤更正機制之晶片系統低功率管理的前瞻研究(3/3)”, NSC 94-2220-E-009-016; 08/2005-07/2006, NT$1,134,000; PI (with co-PI Hsie-Chia Chang).
“低功率系統之設計及自動化-總計畫暨子計畫十:低功率系統架構及整合模擬研究(3/3)”, NSC 94-2220-E-009-013; 08/2005-07/2006, NT$7,120,000; co-PI, with Kuei-Ann Wen (PI).
“System memory design for next-generation e-Home server”, NSC 94-2220-E-009-025; 08/2005-07/2006, NT$732,000; co-PI, with Wei Huang (PI).
“Low Power Design and Voltage Islands in Nano-Scale CMOS”, TSMC; 01/2005-12/2005, NT$500,000; co-PI, with Wei Huang (PI).
“低功率系統之設計與自動化-子計畫三:具效率前置錯誤更正機制之晶片系統低功率管理的前瞻研究(2/3)”, NSC 93-2220-E-009-016; 08/2004-07/2005, NT$959,000; PI (with co-PI Hsie-Chia Chang).
“低功率系統之設計及自動化-總計畫暨子計畫十:低功率系統架構及整合模擬研究(2/3)”, NSC 93-2220-E-009-013; 08/2004-07/2005, NT$7,788,900; co-PI, with Kuei-Ann Wen (PI).
“System memory design for next-generation e-Home server”, NSC 93-2220-E-009-025; 08/2004-07/2005, NT$ 799,700; co-PI, with Wei Huang (PI).
“Low Power Design and Voltage Islands in Nano-Scale CMOS”, TSMC; 01/2004-12/2004, NT$600,000; co-PI, with Wei Huang (PI).
“The Design of Extensible Low-Power DSP Core and Configurable Accerator for Mobile Multimedia--DSP Core” , Industrial Technology Research Institute (ITRI); 01/2004-12/2004, NT$2,200,000; co-PI, with Wei Huang (PI).
“低功率系統之設計與自動化-子計畫三:具效率前置錯誤更正機制之晶片系統低功率管理的前瞻研究(1/3)”, NSC 92-2220-E-009-026; 11/2003-07/2004, NT$629,600; PI (with co-PI Hsie-Chia Chang).
“低功率系統之設計及自動化-總計畫暨子計畫十:低功率系統架構及整合模擬研究(1/3)”, NSC 92-2220-E-009-023; 11/2003-07/2004, NT$ 3,783,600; co-PI, with Kuei-Ann Wen (PI).
“Thermal Aware Power Management IP for System-on-Chip Design (I)”, NSC 92-2218-E-009-014; 08/2003-07/2004, NT$760,400; PI.
“非公務人員(機關)安全認證制度”, NSC 92-2745-P-009-001; 08/2003-11/2003, NT$828,600; PI.
“執行資訊業務整體委外制度檢討與建議”, 科學園區管理局; 06/2003-10/2003, NT$698,000; PI.
“TCP Offload Engine: Platform Based Architecture Design” , Industrial Technology Research Institute (ITRI); 01/2003-12/2003, NT$600,000; PI.
“Thermal Management Silicon IP for SoC Designs”, NSC 92-2215-E-009-042; 01/2003-07/2003, NT$460,000; PI.